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Reconfigurable Digital Systems
ICS_9.00

Description
Course Content "Reconfigurable Digital Systems - Lectures"
1. Introduction: Base system on Microblaze and ARM A9 microprocessors. Connect and access simple AXI-Lite peripherals
2. Custom AXI-Lite peripheral creation.  Signal processing data path: Custom AXI-Full peripheral creation.
3. High-Speed data paths: Custom AXI stream peripherals and DMA interaction. Managing interrupts
4. Developing hardware accelerators for data processing I: a) HDL Approach b) HLS approach. Accelerator software access
5. Developing hardware accelerators for data processing II: c) Insert Model Composer (Matlab) modules in a processing system. Using Vitis Expandable Platform for hardware accelerator insertion
6. Design for Partial Reconfiguration. Design Partitioning to Static and Dynamic design. Using Xilinx’s Dynamic Function Exchange for partial reconfigurable projects
7. Solution for Embedded Linux. The Petalinux environment. UIO drivers under Linux. Integrating hardware accelerators into the Linux environment
Lab Content "Reconfigurable Digital Systems - Project/Lab"
1. Introduction: Base system on a Microblaze microprocessor system with simple AXI-Lite peripherals
2. Zynq Arm-A9 SoC FPGA microprocessor system with simple AXI-Lite peripherals
3. Example for creation of a custom AXI-Lite peripheral. Measuring transfer speed
4 Example for AXI-Full peripheral creation. Designing a signal processing data path. Measuring transfer speed
5. High-Speed data path example I: Using DMA and PL + PS interrupts
6. High-Speed data path example II: Custom AXI stream peripheral. Using Central DMA MM2S and S2MM paths
7. Data processing hardware accelerator example I - HDL implementation. Accelerator insertion and software access example
8. Data processing hardware accelerator example II: HLS implementation. The Vitis HLS environment
9. Model Composer hardware accelerator example. 
10. Vitis Expandable Platform creation and hardware accelerator insertion
11. Dynamic Partial Reconfiguration using only FPGA logic and JTAG example
12. Dynamic Partial Reconfiguration using Processing System and PCAP 
13. Embedded Design with Petalinux tools I. Setting up the environment. UIO drive example
14. Embedded Design with Petalinux tools II. Mapping hardware accelerators in the Linux OS

Crédits ECTS
5

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Entité de gestion (faculté)
Faculty of Electronics, Telecommunications and Information Technology (UTCN)