Course Content "Designing and testing digital circuits - Lectures"
1. Introductory course. The design process using HDL
2. Combinational digital circuits (Karnaugh diagrams, simplification of logic functions, logic gates, memories)
3. Binary trees. PCN notation (Positional Cube Notation). Boolean satisfiability.
4. Sequential digital circuits (bistables, registers, sequential automata)
5. The "delta-time" simulators. Tact based simulators
6. Synthesis of combinational and sequential circuits
7. Modeling digital circuits with HDL
8. Designing a processor with a reduced instruction set
9. Modeling and synthesis of digital processing units (architecture of digital filters and adaptive filters)
10. The JTAG standard. Circuit design for testability
11. Hardware verification languages HVL (Hardware Verification Language): SystemVerilog, PSL
12. Code coverage level
13. Open Verification Library (OVL)
14. Assertions Based Verification
Lab Content "Designing and testing digital circuits - Lab"
1. Imposition of requirements (case study/feasibility)
2. Studying bibliographic references and existing solutions
3. Preparation of technical content
4. Presentation of preliminary results
5. Checking and improving the content
6. Developing a PowerPoint presentation
7. Final tests
