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Computer Architecture - UTCN: CS23.00
Description: | Introduction
| High-Level Synthesis
| Instruction Set Architecture (ISA)
| CPU Design - Single Cycle CPU
| Computer Arithmetic and Simple Arithmetic Logic Units
| CPU Design - Multi Cycle CPU Data path
| CPU Design - Multi Cycle CPU Control
| CPU Design – Pipelined CPU
| Dynamic Scheduling of the Execution
| Speculative execution and Branch Prediction
| Superscalar Architectures
| Memory
| I/O and Interconnection Structures
| Problem solving
ECTS credits: 5
Teaching Language: English
Exam Language: English
Support Materials Language: English
Basic Learning Outcomes
Managing Entity (faculty): Automation and Computer Science Faculty - UTCN